Multi-Mode Segmented Scan Architecture with Layout-Aware Scan Chain Routing for Test Data and Test Time Reduction

Authors:
Po-Chang Tsai;Sying-Jyan Wang
Affiliations:
National Chung-Hsing University, Taiwan, ROC;National Chung-Hsing University, Taiwan, ROC
Venue:
ATS '06 Proceedings of the 15th Asian Test Symposium
Year:
2006

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QC-fill: an X-fill method for quick-and-cool scan test

Proceedings of the Conference on Design, Automation and Test in Europe
Test data compression using interval broadcast scan for embedded cores

Microelectronics Journal

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Abstract

Power of scan operation is dominant factor. This paper proposed the structure to reduce scan power totally. The total scan power reduction architecture uses a duplicated transition monitoring window and sub-scan chains. Experimental results show 60% ...