Superoptimizer: a look at the smallest program
ASPLOS II Proceedings of the second international conference on Architectual support for programming languages and operating systems
Design and implementation of the UW Illustrated compiler
PLDI '88 Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation
A portable global optimizer and linker
PLDI '88 Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation
Quick compilers using peephole optimization
Software—Practice & Experience
International Journal of High Speed Computing
Eliminating branches using a superoptimizer and the GNU C compiler
PLDI '92 Proceedings of the ACM SIGPLAN 1992 conference on Programming language design and implementation
A visualization system for parallelizing programs
Proceedings of the 1992 ACM/IEEE conference on Supercomputing
Isolation and analysis of optimization errors
PLDI '93 Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation
The advantages of machine-dependent global optimization
Proceedings of the international conference on Programming languages and system architectures
An approach for exploring code improving transformations
ACM Transactions on Programming Languages and Systems (TOPLAS)
The SimpleScalar tool set, version 2.0
ACM SIGARCH Computer Architecture News
SUIF Explorer: an interactive and interprocedural parallelizer
Proceedings of the seventh ACM SIGPLAN symposium on Principles and practice of parallel programming
Optimizing for reduced code space using genetic algorithms
Proceedings of the ACM SIGPLAN 1999 workshop on Languages, compilers, and tools for embedded systems
VISTA: a system for interactive code improvement
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
Code Generation for Embedded Processors
Code Generation for Embedded Processors
Start/Pat: A Parallel-Programming Toolkit
IEEE Software
VISTA: The Visual Interface for Scheduling Transformations and Analysis
Proceedings of the 6th International Workshop on Languages and Compilers for Parallel Computing
Finding effective optimization phase sequences
Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool for embedded systems
Phase coupling and constant generation in an optimizing microcode compiler
MICRO 15 Proceedings of the 15th annual workshop on Microprogramming
Combined Selection of Tile Sizes and Unroll Factors Using Iterative Compilation
PACT '00 Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques
Fast searches for effective optimization phase sequences
Proceedings of the ACM SIGPLAN 2004 conference on Programming language design and implementation
Tuning the WCET of Embedded Applications
RTAS '04 Proceedings of the 10th IEEE Real-Time and Embedded Technology and Applications Symposium
MiBench: A free, commercially representative embedded benchmark suite
WWC '01 Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop
Iterative Optimization in the Polyhedral Model: Part I, One-Dimensional Time
Proceedings of the International Symposium on Code Generation and Optimization
RaPTEX: a resource-focused toolchain for rapid prototyping of embedded communication systems
Proceedings of the 2010 Workshop on Interaction between Compilers and Computer Architecture
Localizing globals and statics to make C programs thread-safe
CASES '11 Proceedings of the 14th international conference on Compilers, architectures and synthesis for embedded systems
Portable section-level tuning of compiler parallelized applications
SC '12 Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis
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Software designers face many challenges when developing applications for embedded systems. One major challenge is meeting the conflicting constraints of speed, code size, and power consumption. Embedded application developers often resort to hand-coded assembly language to meet these constraints since traditional optimizing compiler technology is usually of little help in addressing this challenge. The results are software systems that are not portable, less robust, and more costly to develop and maintain. Another limitation is that compilers traditionally apply the optimizations to a program in a fixed order. However, it has long been known that a single ordering of optimization phases will not produce the best code for every application. In fact, the smallest unit of compilation in most compilers is typically a function and the programmer has no control over the code improvement process other than setting flags to enable or disable certain optimization phases. This paper describes a new code improvement paradigm implemented in a system called VISTA that can help achieve the cost/performance trade-offs that embedded applications demand. The VISTA system opens the code improvement process and gives the application programmer, when necessary, the ability to finely control it. VISTA also provides support for finding effective sequences of optimization phases. This support includes the ability to interactively get static and dynamic performance information, which can be used by the developer to steer the code improvement process. This performance information is also internally used by VISTA for automatically selecting the best optimization sequence from several attempted. One such feature is the use of a genetic algorithm to search for the most efficient sequence based on specified fitness criteria. We include a number of experimental results that evaluate the effectiveness of using a genetic algorithm in VISTA to find effective optimization phase sequences.