Impact of line-edge roughness on resistance and capacitance of scaled interconnects
Microelectronic Engineering
Accurate predictive interconnect modeling for system-level design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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This paper describes a simple and novel approach to calculate the line resistance of copper interconnects. The proposed methodology is simply based on a linear representation of the Cu resistivity vs. 1/S"C"u (S"C"u is the Cu cross-sectional area) in which the slope captures the net result of scattering phenomena in Cu.