Two-level adaptive training branch prediction
MICRO 24 Proceedings of the 24th annual international symposium on Microarchitecture
Alternative implementations of two-level adaptive branch prediction
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
Branch classification: a new mechanism for improving branch predictor performance
International Journal of Parallel Programming
An analysis of correlation and predictability: what makes two-level branch predictors work
Proceedings of the 25th annual international symposium on Computer architecture
Dynamic history-length fitting: a third level of adaptivity for branch prediction
Proceedings of the 25th annual international symposium on Computer architecture
Variable length path branch prediction
Proceedings of the eighth international conference on Architectural support for programming languages and operating systems
The impact of delay on the design of branch predictors
Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
Increasing processor performance by implementing deeper pipelines
ISCA '02 Proceedings of the 29th annual international symposium on Computer architecture
ARM System-on-Chip Architecture
ARM System-on-Chip Architecture
Dynamic Data Dependence Tracking and its Application to Branch Prediction
HPCA '03 Proceedings of the 9th International Symposium on High-Performance Computer Architecture
Elastic History Buffer: A Low-Cost Method to Improve Branch Prediction Accuracy
ICCD '97 Proceedings of the 1997 International Conference on Computer Design (ICCD '97)
Proceedings of the 30th annual international symposium on Computer architecture
Analysis of the O-GEometric History Length Branch Predictor
Proceedings of the 32nd annual international symposium on Computer Architecture
The Impact of Branch Direction History Combined with Global Branch History in Branch Prediction
IEICE - Transactions on Information and Systems
The potential of using dynamic information flow analysis in data value prediction
Proceedings of the 19th international conference on Parallel architectures and compilation techniques
Leveraging Strength-Based Dynamic Information Flow Analysis to Enhance Data Value Prediction
ACM Transactions on Architecture and Code Optimization (TACO)
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Branch misprediction limits processor performance significantly, as the pipeline deepens and the instruction issued per cycle increases. Since the introduction of the two-level adaptive branch predictor, branch history has been a major input vector in branch prediction, together with the address of a branch instruction. Until now, the length of branch history has been statically fixed for all branch instructions, and the history length is usually selected in accordance with the size of branch prediction table. However, different branch instructions require different length histories to achieve high prediction accuracies. Therefore, to dynamically adjust to the optimal history length for each branch instruction, this paper presents ''dynamic per-branch history length adjustment'' policy, by tracking data dependencies of branches and identifying strongly correlated branches in branch history. Our method provides optimal history length for each branch instruction, resulting in substantial improvement in prediction accuracy. The proposed solution does not require any forms of prior-profilings, and it provides up to 6% improvement in prediction accuracy. Further, it even outperforms, in some applications, the prediction accuracy of optimally selected history length by prior-profilings.