A genetic algorithm for minimizing maximum lateness on parallel identical batch processing machines with dynamic job arrivals and incompatible job families

Authors:
Sujay Malve;Reha Uzsoy
Affiliations:
Fairfield Manufacturing Company Inc., US 52 South, P.O. Box 7940, Lafayette, IN 47903-7940, USA;Laboratory for Extended Enterprises at Purdue, School of Industrial Engineering, Purdue University, Grissom Hall, 315 N. Grant Street, West Lafayette, IN 47907-2023, USA
Venue:
Computers and Operations Research
Year:
2007

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Abstract

We consider the problem of minimizing maximum lateness on parallel identical batch processing machines with dynamic job arrivals. We propose a family of iterative improvement heuristics based on previous work by Potts [Analysis of a heuristic for one machine sequencing with release dates and delivery times. Operations Research 1980;28:1436-41] and Uzsoy [Scheduling batch processing machines with incompatible job families. International Journal for Production Research 1995;33(10):2685-708] and combine them with a genetic algorithm (GA) based on the random keys encoding of Bean [Genetic algorithms and random keys for sequencing and optimization. ORSA Journal on Computing 1994;6(2):154-60]. Extensive computational experiments show that one of the proposed GAs runs significantly faster than the other, providing a good tradeoff between solution time and quality. The combination of iterative heuristics with GAs consistently outperforms the iterative heuristics on their own.