Non-classical hot-electron mechanism and its implications on the reliability and scalability of the high- κ dielectric N-MOS Flash memory cell

  • Authors:

  • Y. Zhang;D. S. Ang

  • Affiliations:

  • School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798;School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798

  • Venue:
  • Microelectronic Engineering
  • Year:
  • 2007

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Abstract

Because a thick gate dielectric is needed for enhanced retention performance, development of deep-submicrometer flash memory technology entails aggressive channel engineering in order to suppress short-channel effect. In this work, we directly observe, in a 0.14 @mm N-MOS flash cell with an abrupt channel doping profile, a transition from classical channel hot-electron (CHE) injection at high drain bias (V"d"s) to non-classical hot-electron injection at low V"d"s under conventional CHE biasing. We have also systematically investigated the effect of V"d"s reduction on the scalability of the hot-electron induced oxide damage region via a simple current-voltage measurement method. Scaling of the oxide damage region, as V"d"s decreases, is found to be suppressed in cells exhibiting the non-classical hot-electron injection phenomenon. This observation has important implications for the scalability of the high-@k dielectric based MOSFET targeted for multi-bit memory application using separate source and drain side hot-electron injection.