Reconfiguration Procedures for a Polymorphic and Partitionable Multiprocessor
IEEE Transactions on Computers
HARTS: A Distributed Real-Time Architecture
Computer - Special issue on real-time systems
Programming environment for phase-reconfigurable parallel programming on SuperNode
Journal of Parallel and Distributed Computing
Reconfigurable multicomputer networks for very fast real-time applications
AFIPS '82 Proceedings of the June 7-10, 1982, national computer conference
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This paper presents design and evaluation of a decentralized control mechanism of a variable-topology (phase-reconfigurable) multiprocessor architecture. We design and implement an active crossbar communication processor(XCP) which encodes a set of communication instructions. The new interconnection network approach provides an apt phase-reconfiguration method. The new method is distributed in nature and does not require a global control bus that is a time consuming feature as verified in many existing systems. A conjugate-gradient algorithm for solving a linear system equations is used to perform evaluation and comparison.