Multi-Dimensional Circuit and Micro-Architecture Level Optimization

  • Authors:
  • Zhenyu (Jerry) Qi;Matthew Ziegler;Stephen V. Kosonocky;Jan M. Rabaey;Mircea R. Stan

  • Affiliations:
  • University of Virginia, USA;IBM, T.J. Watson Research Center, USA;IBM, T.J. Watson Research Center, USA;University of California at Berkeley, USA;University of Virginia, USA

  • Venue:
  • ISQED '07 Proceedings of the 8th International Symposium on Quality Electronic Design
  • Year:
  • 2007

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Abstract

This paper studies multi-dimensional optimization at both circuit and micro-architecture levels. By formulating and solving the optimization problem with conflicting design objectives and multiple tunable knobs, it is revealed that the 'sensitivity balance' strategy proposed in recent works for performance-energy optimization is a special case of a general multi-dimensional optimization framework. The results derived in this paper help the understanding of efficient trade-off among multiple design objectives with multiple knobs. The example of an industrial control logic implemented in PLA shows 22% energy saving and 70% area reduction at the expense of 4% delay increase.