Power andPerformance Analysis for Early Design Space Exploration

  • Authors:
  • Charles Thangaraj;Tom Chen

  • Affiliations:
  • Colorado State University;Colorado State University

  • Venue:
  • ISVLSI '07 Proceedings of the IEEE Computer Society Annual Symposium on VLSI
  • Year:
  • 2007

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Abstract

Early design space exploration is crucial to achieving optimal designs, when it is increasingly difficult to fit a design into a tight design space. System level exploration needs to be coupled with physical design considerations to guarantee design closure and time-to-market. This paper presents a methodology for early design space exploration aimed at power-delay trade-offs. The proposed methodology allows quick what-if analysis incorporating many design techniques. What-if analysis is performed on three ISCAS85 benchmark circuits to ascertain recipes for power or performance centric designs. Using the proposed methodology we demonstrate 32%, 17% and 32% reduction in power for 9%, 4.3% and 1.3% performance penalty respectively, the what-if analysis also shows 11.25%, 10.31% and 15.3% improvement in performance for 2.35%, 2.43% and 3.85% increase in power, respectively if the same circuits were made performance centric.