The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
Minimizing stall time in single and parallel disk systems
Journal of the ACM (JACM)
Managing Locality Sets: The Model and Fixed-Size Buffers
IEEE Transactions on Computers
Integrated prefetching and caching in single and parallel disk systems
Proceedings of the fifteenth annual ACM symposium on Parallel algorithms and architectures
Integrated prefetching and caching in single and parallel disk systems
Information and Computation
Integrated prefetching and caching in single and parallel disk systems
Information and Computation
| Hi-index | 0.00 |
An efficient algorithm for communicating letter-shape information from a high-speed computer with a large memory to a typesetting device that has a limited memory is presented. The encoding is optimum, in the sense that the total time for typesetting is minimized, using a model that generalizes well-known “demand paging” strategies to the case where changes to the cache are allowed before the associated information is actually needed. Extensive empirical data show that good results are obtained even when difficult technical material is being typeset on a machine that can store information concerning only 100 characters. The methods of this paper are also applicable to other hardware and software caching applications with restricted lookahead.