Communications of the ACM - Special section on computer architecture
SCI-Clone/32—a distributed real time simulation system
Proceedings of the conference on Computing in high energy physics
Memory access buffering in multiprocessors
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
An evaluation of directory schemes for cache coherence
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
The design of nectar: a network backplane for heterogeneous multicomputers
ASPLOS III Proceedings of the third international conference on Architectural support for programming languages and operating systems
Issues related to MIMD shared-memory computers: the NYU ultracomputer approach
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
User-Process Communication Performance in Networks of Computers
IEEE Transactions on Software Engineering
A distributed shared memory multiprocessor ASURA: memory and cache architecture
Proceedings of the 1993 ACM/IEEE conference on Supercomputing
Virtual memory mapped network interface for the SHRIMP multicomputer
ISCA '94 Proceedings of the 21st annual international symposium on Computer architecture
Early experience with message-passing on the SHRIMP multicomputer
ISCA '96 Proceedings of the 23rd annual international symposium on Computer architecture
Scope consistency: a bridge between release consistency and entry consistency
Proceedings of the eighth annual ACM symposium on Parallel algorithms and architectures
Design choices in the SHRIMP system: an empirical study
Proceedings of the 25th annual international symposium on Computer architecture
Virtual memory mapped network interface for the SHRIMP multicomputer
25 years of the international symposia on Computer architecture (selected papers)
Shared virtual memory with automatic update support
ICS '99 Proceedings of the 13th international conference on Supercomputing
Telegraphos: High-Performance Networking for Parallel Processing on Workstation Clusters
HPCA '96 Proceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture
Improving Release-Consistent Shared Virtual Memory using Automatic Update
HPCA '96 Proceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture
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The objective of this paper is to outline the design and operation of a very high-performance, memory-mapped interconnection system, called Merlin. The design can be effectively utilized to interconnect processors in a wide variety on environments, ranging from closely-coupled, dedicated systems to distributed workstations. The system provides a uniform approach to parallel programming which is independent of interconnection topology, processing elements, and languages. By using dynamically mapped reflective memory, the system can support selectively shared virtual memory regions. This approach permits user selected information to be shared at high speeds and with low latency. There is no software involvement in the actual sharing of information and the system overlaps computation and communication automatically, word-by-word, to the extent possible.