Design challenges at 65nm and beyond

  • Authors:
  • Andrew B. Kahng

  • Affiliations:
  • University of California at San Diego

  • Venue:
  • Proceedings of the conference on Design, automation and test in Europe
  • Year:
  • 2007

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Abstract

Semiconductor manufacturing technology faces ever-greater challenges of pitch, mobility, variability, leakage, and reliability. To enable cost-effective continuation of the semiconductor roadmap, there is greater need for design technology to provide "equivalent scaling", and for product-specific design innovation (multi-core architecture, software support, beyond-die integration, etc.) to provide "more than Moore" scaling. Design challenges along the road to 45nm include variability and power management, and leverage of design-manufacturing synergies. Potential solutions include "design for manufacturability" bridges between chip implementation and manufacturing know-how.