Design of asynchronous circuits for high soft error tolerance in deep submicrometer CMOS circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Designing robust threshold gates against soft errors
Microelectronics Journal
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A technique of constructing dual-rail Muller pipelines tolerant to transient faults is proposed. The pipeline datapath is either an NCL-D or NCL-X circuit. A dedicated controller implements the error recovery protocol, which significantly improves fault tolerance with respect to the earlier Rail Synchronization method. A case study featuring transient fault simulation is presented.