A C-element Latch Scheme with Increased Transient Fault Tolerance for Asynchronous Circuits

  • Authors:
  • K. T. Gardiner;A. Yakovlev;A. Bystrov

  • Affiliations:
  • University of Newcastle upon Tyne, UK;University of Newcastle upon Tyne, UK;University of Newcastle upon Tyne, UK

  • Venue:
  • IOLTS '07 Proceedings of the 13th IEEE International On-Line Testing Symposium
  • Year:
  • 2007

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Abstract

A technique of constructing dual-rail Muller pipelines tolerant to transient faults is proposed. The pipeline datapath is either an NCL-D or NCL-X circuit. A dedicated controller implements the error recovery protocol, which significantly improves fault tolerance with respect to the earlier Rail Synchronization method. A case study featuring transient fault simulation is presented.