Wavelets and subband coding
The lifting scheme: a construction of second generation wavelets
SIAM Journal on Mathematical Analysis
JPEG 2000: Image Compression Fundamentals, Standards and Practice
JPEG 2000: Image Compression Fundamentals, Standards and Practice
Semiconductors: the digital signal processor derby
IEEE Spectrum - IEEE medal of honor Herwig Kogelnik
Minimally non-linear integer wavelets for image coding
ICASSP '00 Proceedings of the Acoustics, Speech, and Signal Processing, 2000. on IEEE International Conference - Volume 04
Scalable image coding using reversible integer wavelet transforms
IEEE Transactions on Image Processing
Wavelet-based video coder via bit allocation
IEEE Transactions on Circuits and Systems for Video Technology
Lifting Scheme DWT Implementation in a Wireless Vision Sensor Network
IVIC '09 Proceedings of the 1st International Visual Informatics Conference on Visual Informatics: Bridging Research and Practice
Transcoding in the block DCT space
ICIP'09 Proceedings of the 16th IEEE international conference on Image processing
Algorithms and architectures for 2D discrete wavelet transform
The Journal of Supercomputing
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We develop wavelet engines on a digital signal processors (DSP) platform, the target application being image and intraframe video compression by means of the forthcoming JPEG2000 and Motion-JPEG2000 standards. We describe two implementations, based on the lifting scheme and the filter bank scheme, respectively, and we present experimental results on code profiling. In particular, we address the following problems: (1) evaluating the execution speed of a wavelet engine on a modern DSP; (2) comparing the actual execution speed of the lifting scheme and the filter bank scheme with the theoretical results; (3) using the on-board direct memory access (DMA) to possibly optimize the execution speed. The results allow to assess the performance of a modern DSP in the image coding task, as well as to compare the lifting and filter bank performance in a realistic application scenario. Finally, guidelines for optimizing the code efficiency are provided by investigating the possible use of the on-board DMA.