Digital PM demodulator for brazilian data collecting system

  • Authors:
  • Jose Marcelo Lima Duarte;Francisco das Chagas Mota;Manoel J. M. Carvalho

  • Affiliations:
  • Universidade Federal do Rio Grande, Natal, Brazil;Universidade Federal do Rio Grande, Natal, Brazil;Instituto Nacional de Pesquisa, Natal, Brazil

  • Venue:
  • Proceedings of the 20th annual conference on Integrated circuits and systems design
  • Year:
  • 2007

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Abstract

This paper presents the project and implementation results of a digital PM demodulator system for processing LEO satellite signals from Brazilian Data Collecting System. The demodulator was implemented on the Altera Cyclone II DSP Development Kit equipped with FPGA EP2C70. Demodulation is done with a second order Digital Phase Locked Loop (DPLL) with -π to π linear phase detector realized by a CORDIC algorithm operating on vectoring mode. The parameters of the DPLL were calculated using control system theory.