Dual Antenna Receivers for High Data Rate Terminals

Authors:
Timo Viero;Kim Rounioja;Teemu Sipilä;Raimo Verkasalo;Jarmo Takala;Jorma Lilleberg
Affiliations:
Nokia Corporation, Nokia Group, Espoo, Finland 00045;Nokia Corporation, Oulu, Finland;Nokia Corporation, Oulu, Finland;Nokia Corporation, Oulu, Finland;Tampere University of Technology, Tampere, Finland 33101;Nokia Corporation, Oulu, Finland
Venue:
Wireless Personal Communications: An International Journal
Year:
2007

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Abstract

In this paper, dual antenna receiver architectures are studied including RAKE, chip-level linear equalizer, and their combination. The arithmetic complexity of single and dual antenna receiver methods is analyzed. Cost of such receivers when implemented with customized hardware or software on application-specific instruction set processors (ASIP) is estimated. The study shows that feasible dual antenna detection can be obtained with less than 70% additional costs. More flexible implementation supporting several standards can be obtained with software but it requires higher power consumption due to additional memory.