Elimination the normalization problem in digit on-line arithmetic
IEEE Transactions on Computers
An On-Line Square Root Algorithm
IEEE Transactions on Computers
IEEE Transactions on Computers
Techniques to Reduce the Inherent Limitations of Fully Digit On-Line Arithmetic
IEEE Transactions on Computers
CORDIC architectures: a survey
VLSI Design
Power-delay characteristics of CMOS adders
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
VLSI architecture for low latency radix-4 CORDIC
Computers and Electrical Engineering
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Redundancy, the state of being in excess of what is necessary, as applied in the implementation of computer arithmetic is motivated by three design goals: to improve reliability, to increase speed of operation, and/or to provide structural flexibility. In achieving the first goal, improvement of reliability, hardware redundancy and/or redundant arithmetic codes are applied to the detection and correction of faults. Although this is an increasingly vital area it will not be discussed in this paper. Rather, the focus will be on the other two potential benefits: more specifically, on the judicious use of number systems employing redundancy in representation. A positional number system with fixed radix, r, is redundant if the allowable digit set includes more than r distinct elements, thereby affording alternate representations of a given numeric value. Uniqueness. of representation is sacrificed with hope of greater gains. A novel, rigorous treatment of redundant, radix polynomial representation is included in Reference 1.