Parallel Computer Architecture: A Hardware/Software Approach
Parallel Computer Architecture: A Hardware/Software Approach
The Alpha 21264 Microprocessor
IEEE Micro
Principles and Practices of Interconnection Networks
Principles and Practices of Interconnection Networks
Virtual Circuit Tree Multicasting: A Case for On-Chip Hardware Multicast Support
ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
Mixed-mode multicore reliability
Proceedings of the 14th international conference on Architectural support for programming languages and operating systems
A HyperTransport 3 Physical Layer Interface for FPGAs
ARC '09 Proceedings of the 5th International Workshop on Reconfigurable Computing: Architectures, Tools and Applications
A memory system design framework: creating smart memories
Proceedings of the 36th annual international symposium on Computer architecture
Achieving predictable performance through better memory controller placement in many-core CMPs
Proceedings of the 36th annual international symposium on Computer architecture
The multikernel: a new OS architecture for scalable multicore systems
Proceedings of the ACM SIGOPS 22nd symposium on Operating systems principles
Comparing cache architectures and coherency protocols on x86-64 multicore SMP systems
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
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ACM SIGAda Ada Letters
Virtual prototyping and performance analysis of two memory architectures
EURASIP Journal on Embedded Systems
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Proceedings of the 19th ACM International Symposium on High Performance Distributed Computing
Subspace snooping: filtering snoops with operating system support
Proceedings of the 19th international conference on Parallel architectures and compilation techniques
Your computer is already a distributed system. why isn't your OS?
HotOS'09 Proceedings of the 12th conference on Hot topics in operating systems
A Declarative Language Approach to Device Configuration
ACM Transactions on Computer Systems (TOCS) - Special Issue APLOS 2011
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Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture
Targeted random test generation for power-aware multicore designs
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world
A new degree of freedom for memory allocation in clusters
Cluster Computing
Protozoa: adaptive granularity cache coherence
Proceedings of the 40th Annual International Symposium on Computer Architecture
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To increase performance while operating within a fixed power budget, the AMD Opteron processor integrates multiple x86-64 cores with a router and memory controller. AMD's experience with building a wide variety of system topologies using Opteron's HyperTransport-based processor interface has provided useful lessons that expose the challenges to be addressed when designing future system interconnect, memory hierarchy, and I/O to scale with both the number of cores and sockets in future x86-64 CMP architectures.