Generation of Fault Tests for Linear Logic Networks

Authors:
M. A. Breuer
Affiliations:
Department of Electrical Engineering, University of Southern California
Venue:
IEEE Transactions on Computers
Year:
1972

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Abstract

In this note we study the problem of fault detection in linear logic networks. We introduce the concept of error vectors that indicate how the effect of a fault propagates through a network. These vectors allow one to identify redundancies in the network as well as calculate the output of the network given a fault and an input. Problems related to fault diagnosis and the detection of multiple faults are also considered.