Generation of Fault Tests for Linear Logic Networks
IEEE Transactions on Computers
Derivation of Minimum Test Sets for Unate Logical Circuits
IEEE Transactions on Computers
Complete Test Sets for Logic Functions
IEEE Transactions on Computers
On Realizations of Boolean Functions Requiring a Minimal or Near-Minimal Number of Tests
IEEE Transactions on Computers
Derivation of Minimal Test Sets for Monotonic Logic Circuits
IEEE Transactions on Computers
Universal Test Sets for Logic Networks
IEEE Transactions on Computers
Multiple Stuck-Fault Detection and Location in Multivalued Linear Circuits
IEEE Transactions on Computers
On the Impossible Class of Faulty Functions in Logic Networks Under Short Circuit Faults
IEEE Transactions on Computers
The Complexity of Fault Detection Problems for Combinational Logic Circuits
IEEE Transactions on Computers
On the Complexity of Estimating the Size of a Test Set
IEEE Transactions on Computers
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The concept of closedness of a set of logic functions under stuck-type faults is introduced. All sets of logic functions closed under stuck-type faults are classified. For the sets of logic functions closed under stuck-type faults, the test complexity and the universal test sets are considered. It is shown that for each class of linear functions, OR functions, and AND functions, both the minimum numbers of multiple fault detection tests and multiple fault location tests are exactly n + 1, where n is the number of inputs of the circuits, and that there exists universal test sets with n + 1 tests to detect and locate all multiple faults in such circuits.