Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Polynomially Complete Fault Detection Problems
IEEE Transactions on Computers
The Complexity of Fault Detection Problems for Combinational Logic Circuits
IEEE Transactions on Computers
On Closedness and Test Complexity of Logic Circuits
IEEE Transactions on Computers
Derivation of Minimum Test Sets for Unate Logical Circuits
IEEE Transactions on Computers
Universal Test Sets for Logic Networks
IEEE Transactions on Computers
Compact two-pattern test set generation for combinational and full scan circuits
ITC '98 Proceedings of the 1998 IEEE International Test Conference
| Hi-index | 14.98 |
Most NP-completeness results for test generation problems involve a reduction to the redundancy problem, which explicitly encodes the satisfiability problem. In this correspondence we investigate the complexity of a more modest problem驴that of estimating the size of a test set under the constraint that the circuit is irredundant. We show that even this constrained problem is NP-hard in the strong sense.