Complete register allocation problems
STOC '73 Proceedings of the fifth annual ACM symposium on Theory of computing
The complexity of theorem-proving procedures
STOC '71 Proceedings of the third annual ACM symposium on Theory of computing
Polynomial complete scheduling problems
SOSP '73 Proceedings of the fourth ACM symposium on Operating system principles
A new algorithm for detecting faults.
A new algorithm for detecting faults.
Formal languages and their relation to automata
Formal languages and their relation to automata
Easily Testable Realizations ror Logic Functions
IEEE Transactions on Computers
Some related problems from network flows, game theory and integer programming
SWAT '72 Proceedings of the 13th Annual Symposium on Switching and Automata Theory (swat 1972)
Multiple faults in Reed-Muller canonic networks
SWAT '72 Proceedings of the 13th Annual Symposium on Switching and Automata Theory (swat 1972)
Hidden Markov Models with Patterns and Their Application to Integrated Circuit Testing
ECML '00 Proceedings of the 11th European Conference on Machine Learning
A Parallel Transitive Closure Computation Algorithm for VLSI Test Generation
PARA '02 Proceedings of the 6th International Conference on Applied Parallel Computing Advanced Scientific Computing
9-V Algorithm for Test Pattern Generation of Combinational Digital Circuits
IEEE Transactions on Computers
On Minimal Test Sets for Locating Single Link Failures in Networks
IEEE Transactions on Computers
The Complexity of Fault Detection Problems for Combinational Logic Circuits
IEEE Transactions on Computers
On the Computational Complexity of System Diagnosis
IEEE Transactions on Computers
Identification of Equivalent Faults in Logic Networks
IEEE Transactions on Computers
Universal Tests for Detection of Input/Output Stuck-At and Bridging Faults
IEEE Transactions on Computers
DNA computing approach for automated test pattern generation for digital circuits
International Journal of Systems Science
SAT-controlled redundancy addition and removal: a novel circuit restructuring technique
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Test Generation for Model-Based Diagnosis
Proceedings of the 2008 conference on ECAI 2008: 18th European Conference on Artificial Intelligence
Paper: Automatic test pattern generation on parallel processors
Parallel Computing
Computational complexity in logic testing
INES'10 Proceedings of the 14th international conference on Intelligent engineering systems
Development of tests for VLSI circuit testability at the upper design levels
Automation and Remote Control
ITC'94 Proceedings of the 1994 international conference on Test
B-algorithm: a behavioral test generation algorithm
ITC'94 Proceedings of the 1994 international conference on Test
Multiple distributions for biased random test patterns
ITC'88 Proceedings of the 1988 international conference on Test: new frontiers in testing
IEEE Transactions on Computers
On the Complexity of Estimating the Size of a Test Set
IEEE Transactions on Computers
A model-based active testing approach to sequential diagnosis
Journal of Artificial Intelligence Research
ATWIG, an automatic test pattern generator with inherent guidance
ITC'84 Proceedings of the 1984 international test conference on The three faces of test: design, characterization, production
Correlating testability with fault detection
ITC'84 Proceedings of the 1984 international test conference on The three faces of test: design, characterization, production
Hi-index | 15.01 |
We look at several variations of the single fault detection problem for combinational logic circuits and show that deciding whether single faults are detectable by input-output (I/O) experiments is polynomially complete, i.e., there is a polynomial time algorithm to decide if these single faults are detectable if and only if there is a polynomial time algorithm for problems such as the traveling salesman problem, knapsack problem, etc.