Current-Mode CMOS Multiple-Valued Logic Function Realization Using a Direct Cover Algorithm
ISMVL '95 Proceedings of the 25th International Symposium on Multiple-Valued Logic
Learning Multiple-Valued Logic Networks Based on Back Propagation
ISMVL '95 Proceedings of the 25th International Symposium on Multiple-Valued Logic
A Clocked Multivalued Flip-Flop
IEEE Transactions on Computers
Equivalence and Transformations for Post Multivalued Algebras
IEEE Transactions on Computers
A Method of Solution for Multiple-Valued Logic Expressions
IEEE Transactions on Computers
Reed-Muller Canonical Forms in Multivalued Logic
IEEE Transactions on Computers
On Input and Next-State Equations of the R-S Type M-Stable
IEEE Transactions on Computers
The Prospects for Multivalued Logic: A Technology and Applications View
IEEE Transactions on Computers
Representation of Multivalued Functions Using the Direct Cover Method
IEEE Transactions on Computers
The Complexity of Computational Circuits Versus Radix
IEEE Transactions on Computers
A Many-Valued Algebra for Switching Systems
IEEE Transactions on Computers
A Cellular Array for Multivalued Logic Functions
IEEE Transactions on Computers
Detection of Single, Stuck-Type Failures in Multivalued Combinational Networks
IEEE Transactions on Computers
A Stochastic Dynamic Local Search Method for Learning Multiple-Valued Logic Networks
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Computer minimization of multivalued switching functions
IEEE Transactions on Computers
| Hi-index | 15.05 |
Abstract An algebra for switching circuits that may have multiple values is introduced. A minimization technique suitable for computer implementation is then presented.