A New Approach to the Fault Location of Combinational Circuits
IEEE Transactions on Computers
Functional Transformation in Simplification of Multivalued Switching Functions
IEEE Transactions on Computers
A Minimization Technique for Multiple-Valued Logic Systems
IEEE Transactions on Computers
IEEE Transactions on Computers
A Many-Valued Algebra for Switching Systems
IEEE Transactions on Computers
Selection and implementation of a ternary switching algebra
AFIPS '68 (Spring) Proceedings of the April 30--May 2, 1968, spring joint computer conference
Identification of Multiple Stuck-Type Faults in Combinational Networks
IEEE Transactions on Computers
Diagnosis of automata failures: a calculus and a method
IBM Journal of Research and Development
Random Pattern Fault Simulation in Multi-Valued Circuits
ISMVL '95 Proceedings of the 25th International Symposium on Multiple-Valued Logic
A Higher Radix Technique for Fault Detection in Many-Valued Multithreshold Networks
IEEE Transactions on Computers
Multiple-Valued Logic: An Introduction and Overview
IEEE Transactions on Computers
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This paper examines the problem of detecting single stuck-type faults in multivalued combinational circuits. The algebra employed is the generalized ternary algebra developed by Vranesic, Lee, and Smith. Many of the concepts already developed for fault detection in binary circuits generalized easily to the multivalued case. The special properties of multivalued circuits for this algebra simplifies fault detection. Specifically, this paper introduces the concept of a partially enabled gate, K-paths in combinational circuits and a new notation for multivalued fault detection. In addition, a modified form of the D-algorithm is developed for fault detection in multivalued circuits as well as a d algorithm for the simplification of multivalued test sets.