A Video Display System for Image Processing by Computer
IEEE Transactions on Computers
IEEE Transactions on Computers
The IBM system/360 model 91: storage system
IBM Journal of Research and Development
IEEE Transactions on Computers
Supersystems: Technology and Architecture
IEEE Transactions on Computers
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A high-fidelity video digitizer/processor extracts spatial and gray-scale information from high resolution dynamic video imagery. The 15-MHz bandwidth 60/s images(fields) are low pass filtered to minimize aliasing and digitized in real-time at 20 million samples pe second (MS/s), 9 bits/sample; sequential fields are transferred to memory, retrieved from memory after computer image processing, and reconstituted at up to 40 MS/s into 60 field/s video of 525, 875, or 1225 lines/frame (two interlaced fields). A/D and D/A converters are synchronized with memory by a high-speed interface, composed of a central data interchange (DI), and 8 rarially connected I/O ports. The DI connects the data paths of one or more ports, each communicating with one or more external devices. Separate 16-bit, 40 megawords/s, input and output data buses between each port and the DI allow data entry through any port to the DI and output from the DI through any port(s), even the same port from which the input originated. The A/D and D/A are served by a single port. Two other ports communicate with CDC 3500 and CDC 1700 computers. Yet another port controls up to two megawords of core/solid-state memory, of which 358K word may be accessed at the full data rate. Storage rates into existing memory of 40 MS/s are achieved for 16-32 ms.