A Combinatorial Problem Related to Interleaved Memory Systems
Journal of the ACM (JACM)
Anaysis of interleaved memory systems using blockage buffers
Communications of the ACM
An Investigation of Alternative Cache Organizations
IEEE Transactions on Computers
IEEE Transactions on Computers
A Real-Time Hardware System for Digital Processing of Wide-Band Video Images
IEEE Transactions on Computers
On the Performance of Interleaved Memories with Multiple-Word Bandwidths
IEEE Transactions on Computers
A study of interleaved memory systems
AFIPS '70 (Spring) Proceedings of the May 5-7, 1970, spring joint computer conference
The IBM system/360 model 91: storage system
IBM Journal of Research and Development
Structural aspects of the system/360 model 85: I general organization
IBM Systems Journal
Structural aspects of the system/360 model 85: II the cache
IBM Systems Journal
A Real-Time Hardware System for Digital Processing of Wide-Band Video Images
IEEE Transactions on Computers
AFIPS '80 Proceedings of the May 19-22, 1980, national computer conference
Hi-index | 14.98 |
A memory control unit is described, which, operating in conjunction with a special purpose digital computer, achieves real-time storage into and retrieval from computer memory of individual video images undergoing on-line digitization, processing, and reconstitution. The memory control unit is capable of rapid sequential access on up to six 16 K-word core and two 131 K-word (28-bit word) solid-state memories, achieving data transfers to or from ememory at up to 40 million 9-bit samples/s for 33 ms. The memory control unit employs a variety of data rates, and can, under program control, assemble one or more bytes into, or disassemble one or more bytes from, each memory word. The control unit can sign extend incoming data to any of four different byte lengths from any of four different byte lengths. The control unit possesses dual data busses, one dedicated to memory read operations and a second capable of either "reads from" or "writes into" memory. The eight memory modules are sequenced by a small microprogrammed control store loadable from an associated computer.