On systematic illegal state identification for pseudo-functional testing
Proceedings of the 46th Annual Design Automation Conference
On timing-independent false path identification
Proceedings of the International Conference on Computer-Aided Design
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Using DFT methods such as scan can improve testability and increase fault coverage. However, scan tests may scan in illegal or unreachable states during test application, which may result in incidental detection of functional untestable delay faults during the scan test. This paper presents novel mining techniques for fast top-down functional constraint extraction. The extracted functional constraints capture illegal states through internal signal relations. Imposing these relations as functional constraints to a commercial ATPG tool allows for the generation of effective pseudo-functional tests. We analyze its impact on minimizing the over-testing problem of the scanbased circuits. The experimental results on transition faults and path delay faults reveal that the proposed method produces a small fraction, yet extremely powerful functional constraints effective for constraining the state space.