HARD: Hardware-Assisted Lockset-based Race Detection

• Authors: Pin Zhou;Radu Teodorescu;Yuanyuan Zhou
• Venue: HPCA '07 Proceedings of the 2007 IEEE 13th International Symposium on High Performance Computer Architecture
• Year: 2007

The emergence of multicore architectures will lead to an increase in the use of multithreaded applications that are prone to synchronization bugs, such as data races. Software solutions for detecting data races generally incur large overheads. Hardware support for race detection can significantly reduce that overhead. However, all existing hardware proposals for race detection are based on the happens-before algorithm which is sensitive to thread interleaving and cannot detect races that are not exposed during the monitored run. The lockset algorithm addresses this limitation. Unfortunately, due to the challenging issues such as storing the lockset information and performing complex set operations, so far it has been implemented only in software with 10-30 times performance hit. This paper proposes the rst hardware implementation (called HARD) of the lockset algorithm to exploit the race detection capability of this algorithm with minimal over-head. HARD ef ciently stores lock sets in hardware bloom lters and converts the expensive set operations into fast bitwise logic operations with negligible overhead. We evaluate HARD using six SPLASH-2 applications with 60 randomly injected bugs. Our results show that HARD can detect 54 out of 60 tested bugs, 20% more than happens-before, with only 0.1-2.6% of execution overhead. We also show our hardware design is cost-effective by comparing with the ideal lockset implementation, which would require a large amount of hardware resources.