Transactional memory: architectural support for lock-free data structures
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
Estimating the size of a relational join
Information Systems
Data speculation support for a chip multiprocessor
Proceedings of the eighth international conference on Architectural support for programming languages and operating systems
A Chip-Multiprocessor Architecture with Speculative Multithreading
IEEE Transactions on Computers
Space/time trade-offs in hash coding with allowable errors
Communications of the ACM
The Potential for Using Thread-Level Data Speculation to Facilitate Automatic Parallelization
HPCA '98 Proceedings of the 4th International Symposium on High-Performance Computer Architecture
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Proceedings of the 33rd annual international symposium on Computer Architecture
Improving distributed join efficiency with extended bloom filter operations
AINA '07 Proceedings of the 21st International Conference on Advanced Networking and Applications
An effective hybrid transactional memory system with strong isolation guarantees
Proceedings of the 34th annual international symposium on Computer architecture
BulkSC: bulk enforcement of sequential consistency
Proceedings of the 34th annual international symposium on Computer architecture
LogTM-SE: Decoupling Hardware Transactional Memory from Caches
HPCA '07 Proceedings of the 2007 IEEE 13th International Symposium on High Performance Computer Architecture
HARD: Hardware-Assisted Lockset-based Race Detection
HPCA '07 Proceedings of the 2007 IEEE 13th International Symposium on High Performance Computer Architecture
Implementing Signatures for Transactional Memory
Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture
Why simple hash functions work: exploiting the entropy in a data stream
Proceedings of the nineteenth annual ACM-SIAM symposium on Discrete algorithms
RingSTM: scalable transactions with a single atomic instruction
Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures
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ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
Rerun: Exploiting Episodes for Lightweight Memory Race Recording
ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
On the false-positive rate of Bloom filters
Information Processing Letters
Software Assisted Transact Cache to Support Efficient Unbounded Transactional Memory
HPCC '08 Proceedings of the 2008 10th IEEE International Conference on High Performance Computing and Communications
Notary: Hardware techniques to enhance signatures
Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture
Proceedings of the 2009 ACM SIGPLAN conference on Programming language design and implementation
SigRace: signature-based data race detection
Proceedings of the 36th annual international symposium on Computer architecture
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Communications of the ACM - Finding the Fun in Computer Science Education
Improving Signatures by Locality Exploitation for Transactional Memory
PACT '09 Proceedings of the 2009 18th International Conference on Parallel Architectures and Compilation Techniques
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Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
IEEE Transactions on Knowledge and Data Engineering
An efficient software transactional memory using commit-time invalidation
Proceedings of the 8th annual IEEE/ACM international symposium on Code generation and optimization
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Proceedings of the 8th annual IEEE/ACM international symposium on Code generation and optimization
Proceedings of the 37th annual international symposium on Computer architecture
A new analysis of the false positive rate of a Bloom filter
Information Processing Letters
Implementation tradeoffs in the design of flexible transactional memory support
Journal of Parallel and Distributed Computing
Cardinality estimation and dynamic length adaptation for Bloom filters
Distributed and Parallel Databases
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ARC'10 Proceedings of the 6th international conference on Reconfigurable Computing: architectures, Tools and Applications
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A Bloom filter is a probabilistic bit-array-based set representation that has recently been applied to address-set disambiguation in systems that ease the burden of parallel programming. However, many of these systems intersect the Bloom filter bit-arrays to approximate address-set intersection and decide set disjointness. This is in contrast with the conventional and well-studied approach of making individual membership queries into the Bloom filter. In this paper we present much-needed probabilistic models for the unconventional application of testing set disjointness using Bloom filters. Consequently, we demonstrate that intersecting Bloom filters requires substantially larger bit-arrays to provide the same probability of false set-overlap as querying into the bit-array. For when intersection is unavoidable, we prove that partitioned Bloom filters require less space than unpartitioned. Finally, we show that for Bloom filters with a single hash function, surprisingly, intersection and querying share the same probability of false set-overlap.