Efficient system design space exploration using machine learning techniques
Proceedings of the 45th annual Design Automation Conference
Exploring and predicting the architecture/optimising compiler co-design space
CASES '08 Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems
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Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
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ACM Transactions on Architecture and Code Optimization (TACO)
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Proceedings of the 19th international conference on Parallel architectures and compilation techniques
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MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
ACM Transactions on Embedded Computing Systems (TECS)
Microarchitectural design space exploration made fast
Microprocessors & Microsystems
Inferred Models for Dynamic and Sparse Hardware-Software Spaces
MICRO-45 Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture
Wimpy or brawny cores: A throughput perspective
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ACM Transactions on Architecture and Code Optimization (TACO)
Dynamic microarchitectural adaptation using machine learning
ACM Transactions on Architecture and Code Optimization (TACO)
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The microarchitectural design space of a new processor is too large for an architect to evaluate in its entirety. Even with the use of statistical simulation, evaluation of a single configuration can take excessive time due to the need to run a set of benchmarks with realistic workloads. This paper proposes a novel machine learning model that can quickly and accurately predict the performance and energy consumption of any set of programs on any microarchitectural configuration. This architecture-centric approach uses prior knowledge from off-line training and applies it across benchmarks. This allows our model to pre- dict the performance of any new program across the entire microarchitecture configuration space with just 32 further simulations. We compare our approach to a state-of-the-art program- specific predictor and show that we significantly reduce pre- diction error. We reduce the average error when predicting performance from 24% to just 7% and increase the cor- relation coefficient from 0.55 to 0.95. We then show that this predictor can be used to guide the search of the design space, selecting the best configuration for energy-delay in just 3 further simulations, reducing it to 0.85. We also eval- uate the cost of off-line learning and show that we can still achieve a high level of accuracy when using just 5 bench- marks to train. Finally, we analyse our design space and show how different microarchitectural parameters can af- fect the cycles, energy and energy-delay of the architectural configurations.