Design of a wideband low-power continuous-time ΣΔ modulator in 90 nm CMOS technology

Authors:
Fang Chen;Till Kuendiger;Shervin Erfani;Majid Ahmadi
Affiliations:
Department of Electrical and Computer Engineering, University of Windsor, Windsor, Canada N9B 3P4;Department of Electronics, Carleton University, Ottawa, Canada K1S 5B6;Department of Electrical and Computer Engineering, University of Windsor, Windsor, Canada N9B 3P4;Department of Electrical and Computer Engineering, University of Windsor, Windsor, Canada N9B 3P4
Venue:
Analog Integrated Circuits and Signal Processing
Year:
2008

Citing 3
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Continuous-time delta-sigma modulators for high-speed A/D conversion: theory, practice and fundamental performance limits
Continuous-time sigma-delta modulation for A/D conversion in radio receivers

Continuous-time sigma-delta modulation for A/D conversion in radio receivers
Design of Analog CMOS Integrated Circuits

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A hybrid CT/DT double-sampled SMASH ΣΔ modulator for broadband applications in 90 nm CMOS technology

Analog Integrated Circuits and Signal Processing

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Abstract

The design of a wideband low-power continuous-time (CT) sigma-delta modulator (ΣΔM) is presented. At system level, an improved direct design method is used which allows direct design of the modulator in continuous-time domain. The modulator employs a low-latency flash quantizer to minimize excess loop delay. Digital-to-analog (DAC) trimming technique is used to correct the quantizer offset error, which permits minimum-sized transistors to be used for fast and low-power operation. The modulator is designed in 90 nm CMOS process with single 1.0-V power supply. It achieves a dynamic range (DR) of 75 dB and a signal-to-noise-and-distortion-ratio (SNDR) of 70 dB in a 25 MHz signal bandwidth with 16.4 mW power dissipation.