Proceedings of the 34th conference on Winter simulation: exploring new frontiers
Modeling semiconductor tools for small lotsize FAB simulations
Proceedings of the 38th conference on Winter simulation
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Fluctuations of work-in-progress (WIP) levels cause variability of cycle time and often lead to productivity losses in semiconductor wafer fabrication plants. To identify sources of such variability, we are developing a root cause analysis tool with history logs of operational events, such as high WIP or equipment downtime, as inputs to automatically find the chains of events that create the variability. In the root cause analysis, one of the key steps is to aggregate the observed events into groups that are likely in cause-effect relationships. For operational events that involve time lags in cause-effect relationships, grouping the events requires identification of the time windows of causality based on discrete event simulations. This paper describes a design and implementation of a simulator for this purpose. The simulator does not assume any statistical or mathematical model, and thus is simple to maintain.