Analysis of a physical layer wireless communication system implementation on an SDR baseband processor

Authors:
Babak D. Beheshti
Affiliations:
School of Engineering and Technology, New York Institute of Technology, Old Westbury, NY
Venue:
EHAC'06 Proceedings of the 5th WSEAS International Conference on Electronics, Hardware, Wireless and Optical Communications
Year:
2006

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Abstract

In this paper, implementation and analysis of an entire wireless communication system physical layer receiver in software is presented. The two paramount issues, namely real-time performance of the executable, as compared to hardware implementation performance, and the power consumption projections for the DSP executing the receiver code are presented. Issues investigated include the paradigm-shift from hardware centric algorithm realizations to a software centric methodology, fixed point DSP algorithm implementation in ANSI C, synchronization of receive and transmit events such as TDMA operations, and processing chain partitioning in a software defined radio baseband processing environment. Results presented will include the MIPS requirements of the processing chain, as well as code and data partitioning trade-offs.