The Design of Rijndael
CT-RSA 2001 Proceedings of the 2001 Conference on Topics in Cryptology: The Cryptographer's Track at RSA
Reinventing the Travois: Encryption/MAC in 30 ROM Bytes
FSE '97 Proceedings of the 4th International Workshop on Fast Software Encryption
FPGA Implementations of the ICEBERG Block Cipher
ITCC '05 Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC'05) - Volume I - Volume 01
SEA: a scalable encryption algorithm for small embedded applications
CARDIS'06 Proceedings of the 7th IFIP WG 8.8/11.2 international conference on Smart Card Research and Advanced Applications
HIGHT: a new block cipher suitable for low-resource device
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
ISWPC'09 Proceedings of the 4th international conference on Wireless pervasive computing
FPGA implementation of highly parallelized decoder logic for network coding (abstract only)
Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays
FPGA implementation and performance evaluation of a high throughput crypto coprocessor
Journal of Parallel and Distributed Computing
Design and evaluation of random linear network coding Accelerators on FPGAs
ACM Transactions on Embedded Computing Systems (TECS)
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SEA is a scalable encryption algorithm targeted for small embedded applications. It was initially designed for software implementations in controllers, smart cards, or processors. In this letter, we investigate its performances in recent field-programmable gate array (FPGA) devices. For this purpose, a loop architecture of the block cipher is presented. Beyond its low cost performances, a significant advantage of the proposed architecture is its full flexibility for any parameter of the scalable encryption algorithm, taking advantage of generic VHDL coding. The letter also carefully describes the implementation details allowing us to keep small area requirements. Finally, a comparative performance discussion of SEA with the Advanced Encryption Standard Rijndael and ICEBERG (a cipher purposed for efficient FPGA implementations) is proposed. It illustrates the interest of platform/context-oriented block cipher design and, as far as SEA is concerned, its low area requirements and reasonable efficiency.