An FFT core for DVB-T/DVB-H receivers

Authors:
A. Cortés;I. Vélez;I. Zalbide;A. Irizar;J. F. Sevillano
Affiliations:
Department of Electronic and Communication, CEIT and Tecnun, Univerisity of Navarra, Spain;Department of Electronic and Communication, CEIT and Tecnun, Univerisity of Navarra, Spain;Department of Electronic and Communication, CEIT and Tecnun, Univerisity of Navarra, Spain;Department of Electronic and Communication, CEIT and Tecnun, Univerisity of Navarra, Spain;Department of Electronic and Communication, CEIT and Tecnun, Univerisity of Navarra, Spain
Venue:
VLSI Design
Year:
2008

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Abstract

This paper presents the design and implementation of a 2K/4K/8K multiple mode FFT core for DVB-T/DVB-H receivers. The proposed core is based on a pipeline radix-22 SDF architecture. The necessary changes in the radix-22 SDF architecture to achieve an efficient FFT implementation are detailed. Quantization effects and timing design parameters are analyzed for DVB-T/DVB-H. Area and power results are provided for the proposed core.