A radix-8 wafer scale FFT processor
Journal of VLSI Signal Processing Systems - Special issue: 1990 Workshop on VLSI signal processing
Very Fast Fourier Transform Algorithms Hardware for Implementation
IEEE Transactions on Computers
Pipeline and Parallel-Pipeline FFT Processors for VLSI Implementations
IEEE Transactions on Computers
Fourier Transform Computers Using CORDIC Iterations
IEEE Transactions on Computers
IEEE Transactions on Computers
Hybrid Wordlength Optimization Methods of Pipelined FFT Processors
IEEE Transactions on Computers
An Area-Efficient Design of Variable-Length Fast Fourier Transform Processor
Journal of Signal Processing Systems
An FFT core for DVB-T/DVB-H receivers
VLSI Design
Formal datapath representation and manipulation for implementing DSP transforms
Proceedings of the 45th annual Design Automation Conference
Low-complexity FFT/IFFT IP hardware macrocells for OFDM and MIMO-OFDM CMOS transceivers
Microprocessors & Microsystems
FPGA implementation of Radix-22pipelined FFT processor
WAV'09 Proceedings of the 3rd WSEAS international symposium on Wavelets theory and applications in applied mathematics, signal processing & modern science
Pipeline FFT architectures optimized for FPGAs
International Journal of Reconfigurable Computing - Special issue on selected papers from ReConFig 2008
Radix rkFFTs: matricial representation and SDC/SDF pipeline implementation
IEEE Transactions on Signal Processing
Pipeline architectures for radix-2 new Mersenne number transform
IEEE Transactions on Circuits and Systems Part I: Regular Papers - Special section on 2008 custom integrated circuits conference (CICC 2008)
Hierarchical agent monitoring design approach towards self-aware parallel systems-on-chip
ACM Transactions on Embedded Computing Systems (TECS)
A new FFT concept for efficient VLSI implementation: part ii - parallel pipelined processing
DSP'09 Proceedings of the 16th international conference on Digital Signal Processing
Fully Systolic FFT Architecture for Giga-sample Applications
Journal of Signal Processing Systems
A Comparison Study on Implementing Optical Flow and Digital Communications on FPGAs and GPUs
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
A high throughput FFT processor with no multipliers
ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
A new FFT architecture for 4 × 4 MIMO-OFDMA systems with variable symbol lengths
IIT'09 Proceedings of the 6th international conference on Innovations in information technology
Algorithms and pipeline architectures for 2-D FFT and FFT-like transforms
Digital Signal Processing
Design of low-complexity FFT processor for MIMO-OFDM based SDR systems
ICACT'10 Proceedings of the 12th international conference on Advanced communication technology
Analysis of twiddle factor memory complexity of radix-2ipipelined FFTs
Asilomar'09 Proceedings of the 43rd Asilomar conference on Signals, systems and computers
Scalable FFT processor for MIMO-OFDM based SDR systems
ISWPC'10 Proceedings of the 5th IEEE international conference on Wireless pervasive computing
Interpolation-based SC-FDMA transmitter with localized resource allocation
IEEE Communications Letters
FPGA implementation and testing of a 128 FFT for a MB-OFDM receiver
Analog Integrated Circuits and Signal Processing
Computer Generation of Hardware for Linear Digital Signal Processing Transforms
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Parallel pipelined FFT architectures with reduced number of delays
Proceedings of the great lakes symposium on VLSI
Revisiting finite difference and spectral migration methods on diverse parallel architectures
Computers & Geosciences
ICA3PP'12 Proceedings of the 12th international conference on Algorithms and Architectures for Parallel Processing - Volume Part I
On a wideband fast fourier transform for a radio telescope
ACM SIGARCH Computer Architecture News - ACM SIGARCH Computer Architecture News/HEART '12
Improving energy gains of inexact DSP hardware through reciprocative error compensation
Proceedings of the 50th Annual Design Automation Conference
Pipelined parallel FFT architectures via folding transformation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
MDC FFT/IFFT processor with variable length for MIMO-OFDM systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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