A new FFT architecture for 4 × 4 MIMO-OFDMA systems with variable symbol lengths

Authors:
A. Karachalios;K. Nakos;D. Reisis;H. Alnuweiri
Affiliations:
National and Kapodistrian Univ. of Athens, Department of Physics, Electronics Laboratory;National and Kapodistrian Univ. of Athens, Department of Physics, Electronics Laboratory;National and Kapodistrian Univ. of Athens, Department of Physics, Electronics Laboratory;Texas A&M University at Qatar, Electrical & Computer Engineering, Doha, Qatar
Venue:
IIT'09 Proceedings of the 6th international conference on Innovations in information technology
Year:
2009

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Abstract

We present a new FFT architecture for multi-input multioutput (MIMO) OFDMA wireless systems that require processing variable symbol lengths, ranging from 128 to 2048 complex points. The organization is based on 16 concurrent butterfly processing elements with each element computing a 128-point FFT by implementing an in-place technique. A novel processor-memory interconnection scheme allows the processing elements to operate in sets of k, 1 ≤ k ≤ 16, for completing FFT computations of size 128 × k, up to 2048 points. The architecture scales to support 4 × 4 MIMOOFDMA operation. An FPGA implementation shows that the proposed organization requires 9995 slices on Xilinx Virtex-4 compared to 21624 slices of four parallel FFT architectures accomplishing the same task.