GMDS: hardware implementation of novel real output queuing architecture

  • Authors:
  • R. Arteaga;F. Tobajas;R. Esper-Chain;V. de Armas;Roberto Sarmiento

  • Affiliations:
  • University of Las Palmas de Gran Canaria, Las Palmas de Gran Canaria, Spain;University of Las Palmas de Gran Canaria, Las Palmas de Gran Canaria, Spain;University of Las Palmas de Gran Canaria, Las Palmas de Gran Canaria, Spain;University of Las Palmas de Gran Canaria, Las Palmas de Gran Canaria, Spain;University of Las Palmas de Gran Canaria, Las Palmas de Gran Canaria, Spain

  • Venue:
  • Proceedings of the conference on Design, automation and test in Europe
  • Year:
  • 2008

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Abstract

In this paper, a real output queuing switch prototype implementation is presented. This implementation is based on a novel high speed multidrop backplane and a general purpose line card which includes a Virtex-II 6000 FPGA. This switch is named GMDS (Gigabit MultiDrop Switch) and its main features are the switch matrix replacement by the multidrop backplane -increasing system reliability-, variable lenght packet switching support -avoiding bandwidth efficient loss-, multiple output queuing structure for supporting QoS (Quality of Service) and a minimum speedup.