Introduction to algorithms
Dynamically-Allocated Multi-Queue Buffers for VLSI Communication Switches
IEEE Transactions on Computers
IEEE/ACM Transactions on Networking (TON)
Two-dimensional round-robin schedulers for packet switches with multiple input queues
IEEE/ACM Transactions on Networking (TON)
Principles and practice of mathematics
Principles and practice of mathematics
Scheduling algorithms for input-queued cell switches
Scheduling algorithms for input-queued cell switches
The iSLIP scheduling algorithm for input-queued switches
IEEE/ACM Transactions on Networking (TON)
On the stability of input-queued switches with speed-up
IEEE/ACM Transactions on Networking (TON)
Switching and Traffic Theory for Integrated Broadband Networks
Switching and Traffic Theory for Integrated Broadband Networks
On the Speedup Required for Combined Input and Output Queued Switching
On the Speedup Required for Combined Input and Output Queued Switching
WF2Q: worst-case fair weighted fair queueing
INFOCOM'96 Proceedings of the Fifteenth annual joint conference of the IEEE computer and communications societies conference on The conference on computer communications - Volume 1
Saturn: a terabit packet switch using dual round robin
IEEE Communications Magazine
Matching output queueing with a combined input/output-queued switch
IEEE Journal on Selected Areas in Communications
A practical approach for statistical matching of output queueing
IEEE Journal on Selected Areas in Communications
GMDS: hardware implementation of novel real output queuing architecture
Proceedings of the conference on Design, automation and test in Europe
Cyclic stable matching for three-sided networking services
Computer Networks: The International Journal of Computer and Telecommunications Networking
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We have previously proposed an efficient switch architecture called multiple input/output-queued (MIOQ) switch and showed that the MIOQ switch can match the performance of an output-queued switch statistically. In this paper, we prove theoretically that the MIOQ switch can match the output queueing exactly, not statistically, with no speedup of any component. More specifically, we show that the MIOQ switch with two parallel switches (which we call a parallel MIOQ (PMIOQ) switch in this paper) can provide exact emulation of an output-queued switch with a broad class of service scheduling algorithms including FIFO, weighted fair queueing (WFQ) and strict priority queueing regardless of incoming traffic pattern and switch size.To do that, we first propose the stable strategic alliance (SSA) algorithm that can produce a stable many-to-many assignment, and prove its finite, stable and deterministic properties. Next, we apply the SSA algorithm to the scheduling of a PMIOQ switch with two parallel switches, and show that the stability condition of the SSA algorithm guarantees for the PMIOQ switch to emulate an output-queued switch exactly. To avoid possible conflicts in a parallel switch, each input-output pair matched by the SSA algorithm must be mapped to one of two crossbar switches. For this mapping, we also propose a simple algorithm that requires at most 2N steps for all matched input-output pairs. In addition, to relieve the implementation burden of N input buffers being accessed simultaneously, we propose a buffering scheme called redundant buffering which requires two memory devices instead of N physically-separate memories. In conclusion, we demonstrate that the MIOQ switch requires two crossbar switches in parallel and two physical memories at each input and output to emulate an output-queued switch with no speedup of any component.