Modeling, Simulation and Performance Evaluation for a CIOQ Switch Architecture
ANSS '06 Proceedings of the 39th annual Symposium on Simulation
Throughput Region of Finite-Buffered Networks
IEEE Transactions on Parallel and Distributed Systems
On guaranteed smooth switching for buffered crossbar switches
IEEE/ACM Transactions on Networking (TON)
GMDS: hardware implementation of novel real output queuing architecture
Proceedings of the conference on Design, automation and test in Europe
Performance evaluation of new scheduling methods for the RR/RR CICQ switch
Computer Communications
Multicast scheduling in feedback-based two stage switch
HPSR'09 Proceedings of the 15th international conference on High Performance Switching and Routing
International Journal of Computers and Applications
Distributed WFQ scheduling converging to weighted max-min fairness
Computer Networks: The International Journal of Computer and Telecommunications Networking
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Input queued (IQ) switch architectures with virtual output queues (VOQ) scale up to very high speeds and have been a subject of intense research in the past decade. VOQ IQ switches require switch matrix scheduling algorithms to match input ports to out ports. In this tutorial article, we present an overview of switch matrix scheduling for VOQ IQ switches with crossbar switch fabrics. We then describe what we believe will be the next generation of high-speed crossbar switches: the evolution of IQ switches to combined input and crossbar queued (CICQ) switches. With the continued increase in density of VLSI, sufficient buffering at crossbar cross points for one cell or packet has become feasible to implement. We show how CICQ switches have simple schedulers and result in lower delay than IQ switches. Both IQ and CICQ switches have unstable regions. We show how a threshold and bursting technique can feasibly achieve stability. We also show how CICQ switches are better suited (than IQ switches) for switching of variable-length packets such as IP packets. Many challenges remain in IQ and CICQ switches. In particular, the inclusion of QoS scheduling methods that are currently only suitable for output queued switches is a major open problem.