Modeling, Simulation and Performance Evaluation for a CIOQ Switch Architecture

  • Authors:
  • Antonio M. Alberti;Sebastiao R. de Aguiar Filho;Anilton S. Garcia

  • Affiliations:
  • INATEL - National Institute of Telecommunications, Brazil;FEMC - Fundação Educacional Montes Claros, Brazil;UFES - Federal University of Espirito, Brazil

  • Venue:
  • ANSS '06 Proceedings of the 39th annual Symposium on Simulation
  • Year:
  • 2006

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Abstract

The intense growth experienced by the Internet on the past decade has motivated a considerable development in packet switching architectures. Several architectures have been proposed and implemented. Combined Input-Output Queuing (CIOQ) is one of such successful architectures. In this paper, we present a proposal of modeling, simulation and performance evaluation for two CIOQ switch architectures developed by Santos and Motoyama. The main objective is to evaluate their performance and to compare main results. The performance evaluation covers blocking probability, mean and maximum queuing occupation for several switch dimensions and load intensities. Finally, we validated the proposal models and proved that Santos and Motoyama architectures are very efficient, with small blocking probabilities and queuing requirements.