A method for generating random circuits and its application to routability measurement
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays
Overview of Popular Benchmark Sets
IEEE Design & Test
RT-Level ITC'99 Benchmarks and First ATPG Results
IEEE Design & Test
BerkMin: A Fast and Robust Sat-Solver
Proceedings of the conference on Design, automation and test in Europe
EUDOXUS: A WWW-based Generator of Reusable Arithmetic Cores
RSP '01 Proceedings of the 12th International Workshop on Rapid System Prototyping
Formal Design of Arithmetic Circuits Based on Arithmetic Description Language
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Improvements to combinational equivalence checking
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
QuteSAT: a robust circuit-based SAT solver for complex circuit structure
Proceedings of the conference on Design, automation and test in Europe
A modular CNF-based SAT solver
SBCCI '10 Proceedings of the 23rd symposium on Integrated circuits and system design
Hi-index | 0.00 |
This paper presents a digital circuit generation tool (BenCGen) that can be used to generate 24 very popular types of circuits with parameterized size. More than 1,000,000 different designs may be produced using this tool, ranging from the smallest to the largest size of each circuit. The main goal of BenCGen (BENchmark Circuits GENeration tool) is to provide circuits for the next generation of benchmark sets. Thus, the tool generates designs in a wide range of formats such as BENCH (ISCAS), BLIF, EQN, as well as gate level and register transfer level Verilog. Although BenCGen can, also, be used for digital circuit cores production fostering design reuse, this is not its key goal. Most of the circuits generated by BenCGen have been proved correct through Combinational Equivalence Checking (CEC) using error free circuits already available as golden references. In addition, this paper also presents the first results of SAT-based CEC using a collection of circuits generated by the tool. We selected and compared the most popular and efficient SAT solvers; the results will assuredly help guiding future researchers to select the most appropriate SAT solver for the CEC problem.