An O(n1.5logn) 1-d compaction algorithm

  • Authors:
  • Chi-Yuan Lo;Ravi Varadarajan

  • Affiliations:
  • AT&T Bell Laboratories, 600 Mountain Avenue, Murray Hill, NJ;Cadence Design Systems, 2455 Augustine Drive, Santa Clara, CA and AT&T Bell Laboratories, 600 Mountain Avenue, Murray Hill, NJ

  • Venue:
  • DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
  • Year:
  • 1991

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Abstract

In this paper, we bound the complexity of the major algorithms of 1-d compaction in graph solution and module assembly to be &Ogr;(n15logn). An 1-d hierarchical module assembly method is shown to be free from the x-y interlock problem and achieves significant improvement in space and time requirements by exploiting hierarchy.