A preliminary investigation into parallel routing on a hypercube computer
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
LocusRoute: a parallel global router for standard cells
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Hierarchial global wiring for custom chip design
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Global wiring on a wire routing machine
DAC '82 Proceedings of the 19th Design Automation Conference
Performance driven global routing for standard cell design
Proceedings of the 1997 international symposium on Physical design
Provably good global routing by a new approximation algorithm for multicommodity flow
ISPD '00 Proceedings of the 2000 international symposium on Physical design
Parallel Global Routing Algorithms for Standard Cells
IPPS '97 Proceedings of the 11th International Symposium on Parallel Processing
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A new Parallel HIerarchical algorithm for Global Routing (PHIGURE) is presented in this paper. The router is based on the work of Burstein and Pelavin [1], but has many extensions for general global routing and parallel execution. Main features of the algorithm include structured hierarchical decomposition into separate independent tasks which are suitable for parallel execution and adaptive simplex solution for adding feedthroughs and adjusting channel heights for row-based layout. The algorithm is described and results are presented for a shared-memory multiprocessor implementation.