Efficient parallel algorithms
The Design and Analysis of Computer Algorithms
The Design and Analysis of Computer Algorithms
A transitive closure based algorithm for test generation
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
A Functional Decomposition Method for Redundancy Identification and Test Generation
Journal of Electronic Testing: Theory and Applications
A Parallel Transitive Closure Computation Algorithm for VLSI Test Generation
PARA '02 Proceedings of the 6th International Conference on Applied Parallel Computing Advanced Scientific Computing
DNA and quantum based algorithms for VLSI circuits testing
Natural Computing: an international journal
DNA computing approach for automated test pattern generation for digital circuits
International Journal of Systems Science
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We recently proposed an unconventional digital circuit modeling technique and formulated test generation as an energy minimization problem [7]. Although energy minimization is as hard as test generation, the new approach has two advantages. Since the circuit function is mathematically expressed, operations research techniques like linear and non-linear programming can be applied to test generation. The non-causal form of the model makes parallel processing possible. The energy function E, a quadratic 0-1 function, is split into two sub-functions, a homogeneous posiform and an inhomogeneous posiform. The minimum of E is the sum of the minima of the two sub-functions, each having a minimum value of 0. We obtain a minimizing point of the homogeneous posiform, in time complexity that is linear in the number of sub-function terms, and check if the other sub-function becomes 0. When both become 0, we have a test vector. We discuss several easily parallelizable speedup techniques using the transitive closure and other graph properties. Preliminary results on combinational circuits confirm the feasibility of this technique.