Mathematical Programming: Series A and B
Computing dominators in parallel
Information Processing Letters
A topological search algorithm for ATPG
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Automatic test generation using quadratic 0-1 programming
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
EST: The new frontier in automatic test-pattern generation
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Neural network models and optimization methods for digital testing
Neural network models and optimization methods for digital testing
Neural Net and Boolean Satisfiability Models of Logic Circuits
IEEE Design & Test
IEEE Transactions on Parallel and Distributed Systems
Cost-effective generation of minimal test sets for stuck-at faults in combinational logic circuits
DAC '93 Proceedings of the 30th international Design Automation Conference
Multi-node static logic implications for redundancy identification
DATE '00 Proceedings of the conference on Design, automation and test in Europe
The Quest for Efficient Boolean Satisfiability Solvers
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Static logic implication with application to redundancy identification
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Conversion of Small Functional Test Sets of Nonscan Blocks to Scan Patterns
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Propositional Satisfiability and Constraint Programming: A comparative survey
ACM Computing Surveys (CSUR)
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