EST: The new frontier in automatic test-pattern generation

  • Authors:
  • John Giraldi;Michael L. Bushnell

  • Affiliations:
  • Rutgers University and IBM Corporation, P.O. Box 950, Poughkeepsie, N.Y.;Caip Research Center, Rutgers University, CN 1390, Piscataway, N.J.

  • Venue:
  • DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
  • Year:
  • 1991

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Abstract

We present a new algorithm, EST, that accelerates any combinatorial circuit Automatic Test-Pattern Generation algorithm. EST detects equivalent search states, which are saved for all faults during ATPG. The search space is reduced by using Binary Decision Diagram fragments to detect previously-encountered search states (possibly from prior faults). Search terminates earlier than before. Redundant fault analysis further accelerates ATPG. ATPG is accelerated 1347 times for hard-to-test faults in the ISCAS '85 benchmarks.