A topological search algorithm for ATPG
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Test pattern generation for sequential MOS circuits by symbolic fault simulation
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Automatic test generation using quadratic 0-1 programming
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
EST: The new frontier in automatic test-pattern generation
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Efficient branch and bound search with application to computer-aided design
Efficient branch and bound search with application to computer-aided design
CATAPULT: concurrent automatic testing allowing parallelization and using limited topology
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Search State Equivalence for Redundancy Identification and Test Generation
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
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We present a new combinational circuit automatic test-pattern generation (ATPG)acceleration method called EST that detects equivalent search states, which are saved for later use. The search space is learned and characterized using E-frontiers, which are circuit cut-sets induced by theimplication stack contents. The search space is reduced by matchingthe current search state against previously-encountered search states(possibly from prior faults), and this reduces the length of thesearch. A second contribution is a calculus of redundant faults, which enables EST to make many more mandatoryassignments before search than is possible by prior algorithms, byeffectively using its knowledge of prior faults proven to beredundant. This accelerates ATPG for subsequent faults. Thesemethods accelerate the TOPS algorithm 33.3 times for thehard-to-test faults in the ISCAS ‘85 benchmarks, and the SOCRATES algorithm 5.6 times for the same hard-to-test faults, with little memory overhead.