Efficient instruction scheduling for a pipelined architecture
SIGPLAN '86 Proceedings of the 1986 SIGPLAN symposium on Compiler construction
The program dependence graph and its use in optimization
ACM Transactions on Programming Languages and Systems (TOPLAS)
A new approach to the maximum-flow problem
Journal of the ACM (JACM)
Available instruction-level parallelism for superscalar and superpipelined machines
ASPLOS III Proceedings of the third international conference on Architectural support for programming languages and operating systems
Instruction scheduling for the IBM RISC System/6000 processor
IBM Journal of Research and Development
Selected papers of the second workshop on Languages and compilers for parallel computing
Global instruction scheduling for superscalar machines
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
Postpass Code Optimization of Pipeline Constraints
ACM Transactions on Programming Languages and Systems (TOPLAS)
Percolation Scheduling: A Parallel Compilation Technique
Percolation Scheduling: A Parallel Compilation Technique
Bulldog: a compiler for vliw architectures (parallel computing, reduced-instruction-set, trace scheduling, scientific)
Efficient superscalar performance through boosting
ASPLOS V Proceedings of the fifth international conference on Architectural support for programming languages and operating systems
Avoidance and suppression of compensation code in a trace scheduling compiler
ACM Transactions on Programming Languages and Systems (TOPLAS)
Register file port requirements of transport triggered architectures
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
Instruction scheduling in the TOBEY compiler
IBM Journal of Research and Development
Improving the accuracy of static branch prediction using branch correlation
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
Performance issues in correlated branch prediction schemes
Proceedings of the 28th annual international symposium on Microarchitecture
Instruction scheduling for the Motorola 88110
MICRO 26 Proceedings of the 26th annual international symposium on Microarchitecture
Wavefront scheduling: path based data representation and scheduling of subgraphs
Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture
Embedded software in real-time signal processing systems: design technologies
Readings in hardware/software co-design
The Intel IA-64 Compiler Code Generator
IEEE Micro
Making Compaction-Based Parallelization Affordable
IEEE Transactions on Parallel and Distributed Systems
| Hi-index | 0.00 |