Communicating Real-Time State Machines
IEEE Transactions on Software Engineering - Special issue: specification and analysis of real-time systems
Automatic functional test generation using the extended finite state machine model
DAC '93 Proceedings of the 30th international Design Automation Conference
Protocol testing: review of methods and relevance for software testing
ISSTA '94 Proceedings of the 1994 ACM SIGSOFT international symposium on Software testing and analysis
Symbolic approximations for verifying real-time systems
Symbolic approximations for verifying real-time systems
Diagnostic model-checking for real-time systems
Proceedings of the DIMACS/SYCON workshop on Hybrid systems III : verification and control: verification and control
Completely validated software: in defense of coverage criteria (panel session)
ICSE '89 Proceedings of the 11th international conference on Software engineering
Theoretical Computer Science
System-on-a-chip verification: methodology and techniques
System-on-a-chip verification: methodology and techniques
Test Case Prioritization: A Family of Empirical Studies
IEEE Transactions on Software Engineering
Principles of Verifiable RTL Design
Principles of Verifiable RTL Design
Effectively prioritizing tests in development environment
ISSTA '02 Proceedings of the 2002 ACM SIGSOFT international symposium on Software testing and analysis
Computers and Intractability; A Guide to the Theory of NP-Completeness
Computers and Intractability; A Guide to the Theory of NP-Completeness
Timed Wp-Method: Testing Real-Time Systems
IEEE Transactions on Software Engineering
ICCD '95 Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors
Symbolic Verification of Complex Real-Time Systems with Clock-Restriction Diagram
FORTE '01 Proceedings of the IFIP TC6/WG6.1 - 21st International Conference on Formal Techniques for Networked and Distributed Systems
Efficient Guiding Towards Cost-Optimality in UPPAAL
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Efficient Verification of Timed Automata with BDD-Like Data-Structures
VMCAI 2003 Proceedings of the 4th International Conference on Verification, Model Checking, and Abstract Interpretation
Automated Analysis of an Audio Control Protocol
Proceedings of the 7th International Conference on Computer Aided Verification
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
Symbolic Parametric Safety Analysis of Linear Hybrid Systems with BDD-Like Data-Structures
IEEE Transactions on Software Engineering
Automatic test case generation with region-related coverage annotations for real-time systems
ATVA'05 Proceedings of the Third international conference on Automated Technology for Verification and Analysis
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The state space explosion due to concurrency and timing constraints of concurrent real-time systems (CRTS) presents significant challenges to the verification engineers. In this paper, we investigate how to use coverage techniques to generate efficient test plans for such systems. We first discuss how to use communicating timed automata to model CRTS. We present a new coverage technique, AZC (active zone coverage), based on the zone equivalence relation between states of CRTS. We discuss techniques to estimate AZC values of active zones represented in BDD-like diagrams. We explain how to construct zone trees and map their root-to-leaf paths to test cases. We then present an algorithm to generate test plans by prioritizing the test cases. The test plans that we generate can efficiently achieve full coverage in AZC. We have implemented our ideas with our TCTL model-checker RED. Experiment report with the Bluetooth L2CAP showed improvement of the coverage growth rate in the test plan execution.